概述

The DS28E02 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the FIPS 180-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratchpad to perform write operations. All memory pages can be write protected, and one page can be put in EPROM-emulation mode, where bits can only be changed from a 1 to a 0 state. Each DS28E02 has its own guaranteed unique 64-bit ROM registration number that is factory installed into the chip. The DS28E02 communicates over the single-contact 1-Wire? bus. The communication follows the standard 1-Wire protocol with the registration number acting as the node address in the case of a multidevice 1-Wire network.

關鍵特性

應用/使用

醫(yī)用耗材識別
打印機色帶盒配置與監(jiān)測
授權管理的參考設計
傳感器/配件識別和校準
系統知識產權保護