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TMS320C6203B 定點數(shù)字信號處理器

數(shù)據(jù):

描述

TMS320C6203B器件是TMS320C62x的一部分? TMS320C6000中的定點DSP生成? DSP平臺。 C62x ?? DSP器件基于高性能,先進的VelociTI ??德州儀器(TI)開發(fā)的超長指令字(VLIW)架構(gòu),使這些DSP成為多通道和多功能應用的絕佳選擇。

TMS320C62x ?? DSP為高性能DSP編程挑戰(zhàn)提供了經(jīng)濟高效的解決方案。 TMS320C6203B在300 MHz的時鐘速率下具有高達2400 MIPS的性能。 C6203B DSP具有高速控制器的操作靈活性和陣列處理器的數(shù)字能力。該處理器具有32個32位字長的通用寄存器和8個高度獨立的功能單元。八個功能單元提供六個算術(shù)邏輯單元(ALU)以實現(xiàn)高度并行性,兩個16位乘法器提供32位結(jié)果。 C6203B每周期可產(chǎn)生兩個乘法累加(MAC),總計每秒6億MAC(MMACS)。 C6203B DSP還具有專用硬件邏輯,片上存儲器和額外的片上外設(shè)。

C6203B器件程序存儲器由兩個模塊組成,256K字節(jié)模塊配置為存儲器 - 映射程序空間,另一個128K字節(jié)塊用戶可配置為緩存或內(nèi)存映射程序空間。 C6203B的數(shù)據(jù)存儲器由兩個256K字節(jié)的RAM塊組成。

C6203B器件具有強大而多樣的外設(shè)集。外設(shè)集包括三個多通道緩沖串行端口(McBSP),兩個通用定時器,一個32位擴展總線(XBus),可輕松連接同步或異步行業(yè)標準主機總線協(xié)議,以及無縫32位外部存儲器接口(EMIF)能夠連接到SDRAM或SBSRAM和異步外設(shè)。

C62x ??設(shè)備有一套完整的開發(fā)工具,包括:一個新的C編譯器,一個簡化編程和調(diào)度的匯編優(yōu)化器,以及一個Windows?調(diào)試器接口,用于查看源代碼執(zhí)行。

特性

  • High-Performance Fixed-Point Digital Signal Processor (DSP) - TMS320C62x?
    • 4-, 3.33-ns Instruction Cycle Time
    • 250-, 300-MHz Clock Rate
    • Eight 32-Bit Instructions/Cycle
    • 2000, 2400 MIPS
  • C6203B and C6202 GLS Ball Grid Array (BGA) Packages are Pin-Compatible With the C6204 GLW BGA Package
  • C6203B and C6202B GNZ, GNY and ZNY Packages are Pin-Compatible
  • VelociTI? Advanced Very-Long-Instruction-Word (VLIW) C62x? DSP Core
    • Eight Highly Independent Functional Units:
      • Six ALUs (32-/40-Bit)
      • Two 16-Bit Multipliers (32-Bit Result)
    • Load-Store Architecture With 32 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
  • Instruction Set Features
    • Byte-Addressable (8-, 16-, 32-Bit Data)
    • 8-Bit Overflow Protection
    • Saturation
    • Bit-Field Extract, Set, Clear
    • Bit-Counting
    • Normalization
  • 7M-Bit On-Chip SRAM
    • 3M-Bit Internal Program/Cache (96K 32-Bit Instructions)
    • 4M-Bit Dual-Access Internal Data (512K Bytes)
      • Organized as Two 256K-Byte Blocks for Improved Concurrency
  • 32-Bit External Memory Interface (EMIF)
    • Glueless Interface to Synchronous Memories: SDRAM or SBSRAM
    • Glueless Interface to Asynchronous Memories: SRAM and EPROM
    • 52M-Byte Addressable External Memory Space
  • Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel
  • Flexible Phase-Locked-Loop (PLL) Clock Generator
  • 32-Bit Expansion Bus (XBus)
    • Glueless/Low-Glue Interface to Popular PCI Bridge Chips
    • Glueless/Low-Glue Interface to Popular Synchronous or Asynchronous Microprocessor Buses
    • Master/Slave Functionality
    • Glueless Interface to Synchronous FIFOs and Asynchronous Peripherals
  • Three Multichannel Buffered Serial Ports (McBSPs)
    • Direct Interface to T1/E1, MVIP, SCSA Framers
    • ST-Bus-Switching Compatible
    • Up to 256 Channels Each
    • AC97-Compatible
    • Serial-Peripheral Interface (SPI) Compatible (Motorola?)
  • Two 32-Bit General-Purpose Timers
  • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
  • 352-Pin BGA Package (GNZ)
  • 384-Pin BGA Package (GLS)
  • 384-Pin BGA Package (GNY and ZNY)
  • 0.15-µm/5-Level Metal Process
    • CMOS Technology
  • 3.3-V I/Os, 1.5-V Internal

TMS320C62x, VelociTI, and C62x are trademarks of Texas Instruments.
Motorola is a trademark of Motorola, Inc.
All trademarks are the property of their respective owners.
For more details, see the GLS BGA package bottom view.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
TMS320C6000 and C6000 are trademarks of Texas Instruments.
Windows is a registered trademark of the Microsoft Corporation.

參數(shù) 與其它產(chǎn)品相比 其他 C6000 DSP

 
DSP
TMS320C6203B
1 C62x    

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