最近看到功率器件嵌入PCB的應用，了解了一下，感覺很有前景。照這個趨勢，將來會以PCB封裝各種芯片、被動器件，控制器逐漸器件化，整個供應鏈縮短，控制器公司轉變為PCB級芯片公司，需求量會大量減少。要不去整機廠，要不去搞封裝，感覺又一波失業。不過應該對工藝要求很高，到批量還需要時間。有沒有這樣的工作機會，盡快找一個為未來十年積累一點資本。

一、緯湃科技《PCB嵌入式功率模塊技術走勢分析和應用前景》

印刷電路板（PCB）天然具有以下優異的電氣性能：PCB可以進行多層布線，通過控制線間距及層間距減少EMC的影響，絕緣材料可以滿足400~1000V高壓絕緣的要求，并且埋入PCB的電子器件可以通過高散熱材料和合理的散熱層設計達到優秀的散熱性能。這些性能優勢使得PCB嵌入功率芯片技術用于功率模塊封裝設計具有極大的性能潛力。

通過技術評估，我們認為相較于傳統封裝形式，PCB嵌入式功率模塊單位半導體的通流能力可以提升約40%，或者同樣電流輸出使用的半導體用量減少1/3。同樣功率輸出條件下，功率模塊物料成本有望降低20%。

由于新型封裝的功率換流回路雜感可降低到1nH以下，使得逆變器的整體開關損耗降低到原有逆變器產品的1/3，從而開關頻率的提升所帶來的開關損耗的增加相對于傳統逆變器降低了2/3。 整車上可以通過提高開關頻率來提升電驅系統整體的效率，從而基于同樣的續航里程減少了電池的用量，最終達到整車降本的目的。同時更高的開關頻率使得更小的逆變器體積，以及同樣極對數下控制更高速的電機成為可能。

基于目前樣品進行的AQG324關鍵可靠性驗證表明，PCB嵌入式封裝的設計壽命可達傳統封裝的數倍。 基于這一結果，緯湃科技做了一定的探索，測試PCB材料對功率芯片的高工作結溫的耐受，PCB對不同工況下的溫度變化的耐受，以及PCB工作在高電壓大電流工況下的絕緣性能等。緯湃科技發揮多年來在傳統封裝設計中積累的經驗，攻克多種技術挑戰，最終將完成PCB嵌入式功率模塊的產業化。

https://mp.weixin.qq.com/s/HZMsUVoGpSz_B4oF_lbWfA

二、2024年5月麥格納在USA CTI

https://mp.weixin.qq.com/s/hS9qpSWBojdSRGcZKxauNw

三、英飛凌和 Schweizer Electronic合作片

Infineon’s S-Cell 1200 V CoolSiC Gen2p chips

SCHWEIZER 出品的（智能）p2 封裝是一種將功率半導體嵌入印制電路板的技術。這種方法不僅僅是一種新封裝方法。確切而言，其作用是能根據完全不同的原理來研發電力電子系統。利用智能 p2 封裝技術研發的應用可實現高功率、緊湊結構形式和高集成深度。系統供應商的制造鏈以及系統中的構建和連接技術都明顯得以簡化。此外，從系統層面也開始有了節省成本的潛力。

熱阻更低

由于系統中的電感更小，因此開關損耗更低

靜態情況下的傳導損耗更低

可實現更高功率密度，因此對硅的需求更小

明顯提高產品的堅固性和使用壽命

如下視頻中介紹p2 封裝信息

schweizer.ag/fileadmin/user_upload/P2_Pack_Full_V3-720p.mp4

文章《Advancing Electric Vehicles with Innovative Chip Embedding and Driver Technology》報道了測試性能。Infineon-Chip_Embedding_for_Silcon_Carbide-Article-v01_00-EN.pdf

Double pulse measurements In figure 4 a recorded turn-off waveform can be seen. The board was operated at room temperature with a turn-off resistance of 10Ω and a DC link voltage of 800V. The switched off current is 114A. The top graph shows the measured drain current id,ls and drain-source voltage vds,ls of the low-side MOSFET. The lower graph depicts the gate-source voltage vgs,ls. The gate voltage shows a very smooth shape, first discharging the input capacitance. Then as the drain-source voltage starts to rise the miller plateau can be seen. The current reduction in this phase is due to the discharging of the high-side MOSFET during the voltage rise of vds,ls. After forward biasing the high-side body diode the current decreases rapidly. Due to the low inductive design (~2nH) of the switching cell the magnitude of voltage overshoot is minimal. Also, ringing is very low, facilitating to reach EMI targets in the drivetrain. With the demonstrator board, measurements of up to 100 V/ns (turn-off) and 28 A/ ns (diode turn-off) are performed showing no inherent limitations from Infineon’s CoolSiC technology.

Short circuit measurements and DESAT detection The designed measurement board is also used to test the short circuit behavior of the 1200 V CoolSiC Gen2p under very low-inductive and fast-switching applications. As the shunt resistor cannot withstand the high pulse energy in a short circuit event, it is removed and replaced with a copper sheet. This copper sheet is soldered to the pads of the shunt resistor so that a Rogowski coil can be used. The 3rd generation EiceDRIVER features very low blanking (ideal for SiC), detection and reaction times for the inbuilt DESAT functionality. Measured waveforms can be seen in figure 5. The top figure shows the current for different desaturation capacitors, while the middle and bottom graphs show the drain-source voltage and gate-source voltage. Following a very fast current-rise of 55 A/ns(Rg,on,ext = 0Ω) the current saturates at around 1200 A. Subsequently, the self-heating effect can be seen leading to a reduced saturation current, before turning off the MOSFET via the SOFTOFF pin. It takes the driver only 456 ns after the turn-on (VEE+1.5V) of the driver stage to detect and react (VCC -1.5 V) to the short circuit event. A minimum short circuit time of 549 ns (according to [5]) is reached, showing the striking performance of the combination of an Infineon EiceDRIVER together with an embedded solution. Despite high peak power, the energy reached with the setup is far below the destruction energy of the chip.

四、淺談面向高功率模塊及系統級封裝（SiP）模塊的新一代芯片嵌入技術

半導體封裝丨淺談面向高功率模塊及系統級封裝（SiP）模塊的新一代芯片嵌入技術