SRC4382 2 通道采樣率轉(zhuǎn)換器，具有數(shù)字音頻接口接收器和發(fā)送器

數(shù)據(jù)： Two-Channel, Asynchronous Sample Rate Converter with Integrated Digital Audio 數(shù)據(jù)表

描述

SRC4382是一款高度集成的CMOS器件，專為專業(yè)和廣播數(shù)字音頻系統(tǒng)而設(shè)計。 SRC4382將高性能雙通道異步采樣率轉(zhuǎn)換器（SRC）與數(shù)字音頻接口接收器（DIR）和發(fā)送器（DIT），兩個音頻串行端口以及用于互連功能塊數(shù)據(jù)的靈活分配邏輯相結(jié)合和時鐘。

DIR和DIT兼容AES3，S /PDIF，IEC 60958和EIAJ CP-1201接口標(biāo)準(zhǔn)。音頻串行端口，DIT和SRC可以以高達(dá)216kHz的采樣率運行。 DIR鎖定范圍包括20kHz至216kHz的采樣率。

SRC4382采用片上控制寄存器和數(shù)據(jù)緩沖器配置，可通過4線串行外設(shè)接口（SPI）端口訪問，或2線Philips I ² C總線接口。狀態(tài)寄存器提供對各種標(biāo)志和錯誤位的訪問，這些位從各種功能塊派生而來。提供開漏中斷輸出引腳，并通過控制寄存器設(shè)置靈活的中斷報告和屏蔽選項提供支持。主復(fù)位輸入引腳用于由主處理器或監(jiān)控功能進(jìn)行初始化。

SRC4382需要一個+ 1.8V核心邏輯電源，此外還有+ 3.3V電源為DIR部分供電， DIT，以及線路驅(qū)動器和接收器功能。獨立的邏輯I /O電源支持+ 1.65V至+ 3.6V的操作，提供與數(shù)字信號處理器和可編程邏輯器件上常見的低電壓邏輯接口的兼容性。 SRC4382采用無鉛TQFP-48封裝，與德州儀器（TI）SRC4392和DIX4192產(chǎn)品引腳和寄存器兼容。

特性

Two-Channel Asynchronous Sample Rate Converter (SRC)
- Dynamic Range with -60dB Input (A-Weighted): 128dB typical
- Total Harmonic Distortion and Noise (THD+N) with Full-Scale Input: -125dB typical
- Supports Audio Input and Output Data Word Lengths Up to 24 Bits
- Supports Input and Output Sampling Frequencies Up to 216kHz
- Automatic Detection of the Input-to-Output Sampling Ratio
- Wide Input-to-Output Conversion Range: 16:1 to 1:16 Continuous
- Excellent Jitter Attenuation Characteristics
- Digital De-Emphasis Filtering for 32kHz, 44.1kHz, and 48kHz Input Sampling Rates
- Digital Output Attenuation and Mute Functions
- Output Word Length Reduction
- Status Registers and Interrupt Generation for Sampling Ratio and Ready Flags
Digital Audio Interface Transmitter (DIT)
- Supports Sampling Rates Up to 216kHz
- Includes Differential Line Driver and CMOS Buffered Outputs
- Block-Sized Data Buffers for Both Channel Status and User Data
- Status Registers and Interrupt Generation for Flag and Error Conditions
User-Selectable Serial Host Interface: SPI or Philips I²C?
- Provides Access to On-Chip Registers and Data Buffers
Digital Audio Interface Receiver (DIR)
- PLL Lock Range Includes Sampling Rates from 20kHz to 216kHz
- Includes Four Differential Input Line Receivers and an Input Multiplexer
- Bypass Multiplexer Routes Line Receiver Outputs to Line Driver and Buffer Outputs
- Block-Sized Data Buffers for Both Channel Status and User Data
- Automatic Detection of Non-PCM Audio Streams (DTS CD/LD and IEC 61937 formats)
- Audio CD Q-Channel Sub-Code Decoding and Data Buffer
- Status Registers and Interrupt Generation for Flag and Error Conditions
- Low Jitter Recovered Clock Output
Two Audio Serial Ports (Ports A and B)
- Synchronous Serial Interface to External Signal Processors, Data Converters, and Logic
- Slave or Master Mode Operation with Sampling Rates up to 216kHz
- Supports Left-Justified, Right-Justified, and Philips I²S? Data Formats
- Supports Audio Data Word Lengths Up to 24 Bits
Four General-Purpose Digital Outputs
- Multifunction Programmable Via Control Registers
Extensive Power-Down Support
- Functional Blocks May Be Disabled Individually When Not In Use
Operates From +1.8V Core and +3.3V I/O Power Supplies
Small TQFP-48 Package, Compatible with the SRC4392 and DIX4192
APPLICATIONS
- DIGITAL AUDIO RECORDERS AND MIXING DESKS
- DIGITAL AUDIO INTERFACES FOR COMPUTERS
- DIGITAL AUDIO ROUTERS AND DISTRIBUTION SYSTEMS
- BROADCAST STUDIO EQUIPMENT
- DVD/CD RECORDERS
- SURROUND SOUND DECODERS AND A/V RECEIVERS
- CAR AUDIO SYSTEMS

U.S. Patent No. 7,262,716

Dolby is a registered trademark of Dolby Laboratories.
I2C, I2S are trademarks of Koninklijke Philips Electronics N.V.
All other trademarks are the property of their respective owners.

參數(shù) 與其它產(chǎn)品相比?采樣速率轉(zhuǎn)換器

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# SRC Channels
Control Mode
Audio Data Format
Dynamic Range (dB)
THD+N (dB)
Digital Audio Interface
Control Interface
Digital Supply (up to 5 V) (V)
Power Supply (V)
Operating Temperature Range (C)
Pin/Package
Rating
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