關(guān)于晶體諧振器電路應(yīng)用三個(gè)常見(jiàn)誤區(qū)

關(guān)于晶體諧振器電路應(yīng)用三個(gè)常見(jiàn)誤區(qū)，晶科鑫為您整理如下：

Drive level 驅(qū)動(dòng)電平

Applying excessive drive level to the crystal units may cause deterioration of characteristics or damage. Circuit design must be such as to maintain a proper drive level.

若對(duì)晶體諧振器施加過(guò)大的驅(qū)動(dòng)電平，可能會(huì)導(dǎo)致其物理特性惡化或損壞。電路設(shè)計(jì)必須確保為晶體諧振器提供合適范圍內(nèi)的驅(qū)動(dòng)電平。針對(duì)每一款晶體諧振器Drive level (驅(qū)動(dòng)電平)的大小，晶科鑫的晶體諧振器規(guī)格書(shū)都有清晰注明。

Negative resistance 負(fù)性阻抗

Unless adequate negative resistance is allocated in the oscillation circuit, oscillation start up time may increase or no oscillation may occur. In order to avoid this, provide enough negative resistance in the circuitry design.

在振蕩電路中如果分配的負(fù)性阻抗不夠，晶體諧振器振蕩的啟動(dòng)時(shí)間可能會(huì)延長(zhǎng)或無(wú)振蕩頻率產(chǎn)生。請(qǐng)?jiān)陔娐吩O(shè)計(jì)時(shí)，提供足夠負(fù)性阻抗，以確保晶體諧振器正常起振。

Load capacitance 負(fù)載電容

Differences in the load capacitance in the oscillation circuit may result in deviations in the oscillation frequency from the desired frequency. Attempting to tune by force may merely cause abnormal oscillation. Before use, please specify the load capacitance of the oscillation circuit.

振蕩電路中負(fù)載電容的差異可能導(dǎo)致振蕩頻率與期望頻率產(chǎn)生偏差。若通過(guò)強(qiáng)制調(diào)諧，可能會(huì)導(dǎo)致晶體振蕩器振蕩異常。在晶體諧振器使用之前，請(qǐng)務(wù)必確認(rèn)振蕩電路的負(fù)載電容。

審核編輯：湯梓紅