為解決現代電子戰對接收機處理帶寬寬、靈敏度高及實時性處理的要求，提出一種數字信道化接收機的設計方法。在推導高效信道化接收機模型的基礎上，采用多相濾波器結構實現的數字信道化接收機。該接收機利用超高速A/D對數據進行高速采樣，然后由高性能FPGA進行數據抽取、多相濾波、CORDIC算法等信道化實時處理。為了提高實時性，采用并行IFFT實現。該信道化接收機不僅能穩定輸出載頻及相位信息，還能處理三路同時到達的不同信號。實際的性能測試結果表明該接收機的功能正確并達到預定指標。

Abstract:

?To meet requirements of the modern electronic warfare on the wide receiver processing bandwidth， high sensitivity and real-time processing，a digital channelized receiver design was proposed. Based on the derivation of efficient channel receiver model，polyphase filter structure wa adopted to realize digital channelized receiver. The high-speed A/D was used for data acquisition，and high-performance FPGA exceeded the channel real-time processing such as data extraction， polyphase filter， and CORDIC algorithms. In order to improve real-time， parallel IFFT was implemented. The receiver not only could steadily output the frequency and phase information，but also could deal with three different ways signals which arrived at the same time. The actual performance results show that the receiver has correct function and hits the intended target.

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