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電子發燒友網>電子資料下載>可編程邏輯>FPGA/ASIC>High-Speed Differential Signal

High-Speed Differential Signal

2009-05-14 | rar | 343 | 次下載 | 5積分

資料介紹

High-Speed Differential Signaling in Cyclone Devices

From high-speed backplane applications to high-end switch boxes,
low-voltage differential signaling (LVDS) is the technology of choice.
LVDS is a low-voltage differential signaling standard, allowing higher
noise immunity than single-ended I/O technologies. Its low-voltage
swing allows for high-speed data transfers, low power consumption, and
less electromagnetic interference (EMI). LVDS I/O signaling is a data
interface standard defined in the TIA/EIA-644 and IEEE Std. 1596.3
specifications.
The reduced swing differential signaling (RSDS) standard is a derivative
of the LVDS standard. The RSDS I/O standard is similar in electrical
characteristics to LVDS, but has a smaller voltage swing and therefore
provides further power benefits and reduced EMI. National
Semiconductor Corporation introduced the RSDS specification and now
many vendors use it for flat panel display (FPD) links between the
controller and the drivers that drive the display column drivers. Cyclone?
devices support the RSDS I/O standard at speeds up to 311 megabits per
second (Mbps).
Altera? Cyclone devices allow you to transmit and receive data through
LVDS signals at a data rate up to 640 Mbps. For the LVDS transmitter and
receiver, the Cyclone device’s input and output pins support serialization
and deserialization through internal logic.
This chapter describes how to use Cyclone I/O pins for LVDS and RSDS
signaling and contains the following topics:

Differenti
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