The TPS3813 supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems.

During power on, RESET is asserted when supply voltage (V_DD) becomes higher than 1.1 V. Thereafter, the supervisory circuit monitors V_DD and keeps RESET active as long as V_DD remains below the threshold voltage (V_IT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, t_d = 25 ms typical, starts after V_DD has risen above the threshold voltage (V_IT). When the supply voltage drops below the threshold voltage (V_IT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (V_IT) set by an internal voltage divider.